//skip from RegEx
// ---- Created with 3Dmigoto v1.3.11 on Sun Jan 27 17:06:41 2019
cbuffer cb4 : register(b4)
{
  float4 cb4[1];
}

cbuffer cb3 : register(b3)
{
  float4 cb3[21];
}

cbuffer cb2 : register(b2)
{
  float4 cb2[7];
}

cbuffer cb1 : register(b1)
{
  float4 cb1[6];
}

cbuffer cb0 : register(b0)
{
  float4 cb0[1];
}




// 3Dmigoto declarations
#define cmp -
Texture1D<float4> IniParams : register(t120);
Texture2D<float4> StereoParams : register(t125);


void main(
  float4 v0 : POSITION0,
  float3 v1 : NORMAL0,
  float4 v2 : TEXCOORD0,
  out float4 o0 : SV_POSITION0,
  out float2 o1 : TEXCOORD2)
{
  float4 r0,r1,r2;
  uint4 bitmask, uiDest;
  float4 fDest;

  r0.x = dot(v1.xyz, cb2[4].xyz);
  r0.y = dot(v1.xyz, cb2[5].xyz);
  r0.z = dot(v1.xyz, cb2[6].xyz);
  r0.w = dot(r0.xyz, r0.xyz);
  r0.w = rsqrt(r0.w);
  r0.xyz = r0.xyz * r0.www;
  r1.xyzw = cb2[1].xyzw * v0.yyyy;
  r1.xyzw = cb2[0].xyzw * v0.xxxx + r1.xyzw;
  r1.xyzw = cb2[2].xyzw * v0.zzzz + r1.xyzw;
  r1.xyzw = cb2[3].xyzw * v0.wwww + r1.xyzw;
  r2.xyz = -r1.xyz * cb0[0].www + cb0[0].xyz;
  r0.w = dot(r2.xyz, r2.xyz);
  r0.w = rsqrt(r0.w);
  r2.xyz = r2.xyz * r0.www;
  r0.w = dot(r0.xyz, r2.xyz);
  r0.w = -r0.w * r0.w + 1;
  r0.w = sqrt(r0.w);
  r0.w = cb1[5].z * r0.w;
  r0.xyz = -r0.xyz * r0.www + r1.xyz;
  r0.w = cmp(cb1[5].z != 0.000000);
  r0.xyz = r0.www ? r0.xyz : r1.xyz;
  r2.xyzw = cb3[18].xyzw * r0.yyyy;
  r2.xyzw = cb3[17].xyzw * r0.xxxx + r2.xyzw;
  r0.xyzw = cb3[19].xyzw * r0.zzzz + r2.xyzw;
  r0.xyzw = cb3[20].xyzw * r1.wwww + r0.xyzw;
  r1.x = cb1[5].x / r0.w;
  r1.x = min(0, r1.x);
  r1.x = max(-1, r1.x);
  r0.z = r1.x + r0.z;
  r1.x = min(r0.z, r0.w);
  o0.xyw = r0.xyw;
  r0.x = r1.x + -r0.z;
  o0.z = cb1[5].y * r0.x + r0.z;
  o1.xy = v2.xy * cb4[0].xy + cb4[0].zw;
  return;
}

/*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
//
// Generated by Microsoft (R) D3D Shader Disassembler
//
//   using 3Dmigoto v1.3.11 on Sun Jan 27 17:06:41 2019
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// POSITION                 0   xyzw        0     NONE   float   xyzw
// NORMAL                   0   xyz         1     NONE   float   xyz
// TEXCOORD                 0   xyzw        2     NONE   float   xy
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_POSITION              0   xyzw        0      POS   float   xyzw
// TEXCOORD                 2   xy          1     NONE   float   xy
//
vs_4_0
dcl_constantbuffer cb0[1], immediateIndexed
dcl_constantbuffer cb1[6], immediateIndexed
dcl_constantbuffer cb2[7], immediateIndexed
dcl_constantbuffer cb3[21], immediateIndexed
dcl_constantbuffer cb4[1], immediateIndexed
dcl_input v0.xyzw
dcl_input v1.xyz
dcl_input v2.xy
dcl_output_siv o0.xyzw, position
dcl_output o1.xy
dcl_temps 3
dp3 r0.x, v1.xyzx, cb2[4].xyzx
dp3 r0.y, v1.xyzx, cb2[5].xyzx
dp3 r0.z, v1.xyzx, cb2[6].xyzx
dp3 r0.w, r0.xyzx, r0.xyzx
rsq r0.w, r0.w
mul r0.xyz, r0.wwww, r0.xyzx
mul r1.xyzw, v0.yyyy, cb2[1].xyzw
mad r1.xyzw, cb2[0].xyzw, v0.xxxx, r1.xyzw
mad r1.xyzw, cb2[2].xyzw, v0.zzzz, r1.xyzw
mad r1.xyzw, cb2[3].xyzw, v0.wwww, r1.xyzw
mad r2.xyz, -r1.xyzx, cb0[0].wwww, cb0[0].xyzx
dp3 r0.w, r2.xyzx, r2.xyzx
rsq r0.w, r0.w
mul r2.xyz, r0.wwww, r2.xyzx
dp3 r0.w, r0.xyzx, r2.xyzx
mad r0.w, -r0.w, r0.w, l(1.000000)
sqrt r0.w, r0.w
mul r0.w, r0.w, cb1[5].z
mad r0.xyz, -r0.xyzx, r0.wwww, r1.xyzx
ne r0.w, cb1[5].z, l(0.000000)
movc r0.xyz, r0.wwww, r0.xyzx, r1.xyzx
mul r2.xyzw, r0.yyyy, cb3[18].xyzw
mad r2.xyzw, cb3[17].xyzw, r0.xxxx, r2.xyzw
mad r0.xyzw, cb3[19].xyzw, r0.zzzz, r2.xyzw
mad r0.xyzw, cb3[20].xyzw, r1.wwww, r0.xyzw
div r1.x, cb1[5].x, r0.w
min r1.x, r1.x, l(0.000000)
max r1.x, r1.x, l(-1.000000)
add r0.z, r0.z, r1.x
min r1.x, r0.w, r0.z
mov o0.xyw, r0.xyxw
add r0.x, -r0.z, r1.x
mad o0.z, cb1[5].y, r0.x, r0.z
mad o1.xy, v2.xyxx, cb4[0].xyxx, cb4[0].zwzz
ret
// Approximately 0 instruction slots used

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~*/
